x86: clean up esr_disable() methods
authorIngo Molnar <mingo@elte.hu>
Wed, 28 Jan 2009 04:01:41 +0000 (05:01 +0100)
committerIngo Molnar <mingo@elte.hu>
Wed, 28 Jan 2009 22:20:17 +0000 (23:20 +0100)
Impact: cleanup

Most subarchitectures want to disable the APIC ESR (Error Status Register),
because they generally have hardware hacks that wrap standard CPUs into
a bigger system and hence the APIC bus is quite non-standard and weirdnesses
(lockups) have been seen with ESR reporting.

Remove the esr_disable macros and put the desired flag into each
subarchitecture's genapic template directly.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
12 files changed:
arch/x86/include/asm/bigsmp/apic.h
arch/x86/include/asm/es7000/apic.h
arch/x86/include/asm/mach-default/mach_apic.h
arch/x86/include/asm/mach-generic/mach_apic.h
arch/x86/include/asm/numaq/apic.h
arch/x86/include/asm/summit/apic.h
arch/x86/kernel/apic.c
arch/x86/mach-generic/bigsmp.c
arch/x86/mach-generic/default.c
arch/x86/mach-generic/es7000.c
arch/x86/mach-generic/numaq.c
arch/x86/mach-generic/summit.c

index d6aeca3..b550cb1 100644 (file)
@@ -2,7 +2,6 @@
 #define __ASM_MACH_APIC_H
 
 #define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
-#define esr_disable (1)
 
 static inline int bigsmp_apic_id_registered(void)
 {
index 53adda0..aa11c76 100644 (file)
@@ -4,7 +4,6 @@
 #include <linux/gfp.h>
 
 #define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
-#define esr_disable (1)
 
 static inline int es7000_apic_id_registered(void)
 {
index 77a9724..5f8d17f 100644 (file)
@@ -18,7 +18,6 @@ static inline const struct cpumask *default_target_cpus(void)
 } 
 
 #define NO_BALANCE_IRQ (0)
-#define esr_disable (0)
 
 #ifdef CONFIG_X86_64
 #include <asm/genapic.h>
index da2d778..63fe985 100644 (file)
@@ -3,7 +3,6 @@
 
 #include <asm/genapic.h>
 
-#define esr_disable (apic->ESR_DISABLE)
 #define NO_BALANCE_IRQ (apic->no_balance_irq)
 #undef APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL (apic->apic_destination_logical)
index 1111ff9..8ecb3b4 100644 (file)
@@ -13,7 +13,6 @@ static inline const cpumask_t *numaq_target_cpus(void)
 }
 
 #define NO_BALANCE_IRQ (1)
-#define esr_disable (1)
 
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
 {
index cf5036f..84679e6 100644 (file)
@@ -4,7 +4,6 @@
 #include <asm/smp.h>
 #include <linux/gfp.h>
 
-#define esr_disable (1)
 #define NO_BALANCE_IRQ (0)
 
 /* In clustered mode, the high nibble of APIC ID is a cluster number.
index b6740de..69d8c30 100644 (file)
@@ -1107,7 +1107,7 @@ static void __cpuinit lapic_setup_esr(void)
                return;
        }
 
-       if (esr_disable) {
+       if (apic->ESR_DISABLE) {
                /*
                 * Something untraceable is creating bad interrupts on
                 * secondary quads ... for the moment, just leave the
@@ -1157,7 +1157,7 @@ void __cpuinit setup_local_APIC(void)
 
 #ifdef CONFIG_X86_32
        /* Pound the ESR really hard over the head with a big hammer - mbligh */
-       if (lapic_is_integrated() && esr_disable) {
+       if (lapic_is_integrated() && apic->ESR_DISABLE) {
                apic_write(APIC_ESR, 0);
                apic_write(APIC_ESR, 0);
                apic_write(APIC_ESR, 0);
index d3cead2..f0bb726 100644 (file)
@@ -69,7 +69,7 @@ struct genapic apic_bigsmp = {
        .irq_dest_mode                  = 0,
 
        .target_cpus                    = bigsmp_target_cpus,
-       .ESR_DISABLE                    = esr_disable,
+       .ESR_DISABLE                    = 1,
        .apic_destination_logical       = APIC_DEST_LOGICAL,
        .check_apicid_used              = check_apicid_used,
        .check_apicid_present           = check_apicid_present,
index a483e22..c30141a 100644 (file)
@@ -36,7 +36,7 @@ struct genapic apic_default = {
        .irq_dest_mode                  = 1,
 
        .target_cpus                    = default_target_cpus,
-       .ESR_DISABLE                    = esr_disable,
+       .ESR_DISABLE                    = 0,
        .apic_destination_logical       = APIC_DEST_LOGICAL,
        .check_apicid_used              = check_apicid_used,
        .check_apicid_present           = check_apicid_present,
index e31f0c3..e8aa8fd 100644 (file)
@@ -112,7 +112,7 @@ struct genapic apic_es7000 = {
        .irq_dest_mode                  = 0,
 
        .target_cpus                    = es7000_target_cpus,
-       .ESR_DISABLE                    = esr_disable,
+       .ESR_DISABLE                    = 1,
        .apic_destination_logical       = APIC_DEST_LOGICAL,
        .check_apicid_used              = check_apicid_used,
        .check_apicid_present           = check_apicid_present,
index 4b84b59..860edc8 100644 (file)
@@ -56,7 +56,7 @@ struct genapic apic_numaq = {
        .irq_dest_mode                  = 0,
 
        .target_cpus                    = numaq_target_cpus,
-       .ESR_DISABLE                    = esr_disable,
+       .ESR_DISABLE                    = 1,
        .apic_destination_logical       = APIC_DEST_LOGICAL,
        .check_apicid_used              = check_apicid_used,
        .check_apicid_present           = check_apicid_present,
index e6b956a..cd5ef11 100644 (file)
@@ -49,7 +49,7 @@ struct genapic apic_summit = {
        .irq_dest_mode                  = 1,
 
        .target_cpus                    = summit_target_cpus,
-       .ESR_DISABLE                    = esr_disable,
+       .ESR_DISABLE                    = 1,
        .apic_destination_logical       = APIC_DEST_LOGICAL,
        .check_apicid_used              = check_apicid_used,
        .check_apicid_present           = check_apicid_present,