ARM: mx28: check for gated clocks when setting saif divider
authorWolfram Sang <w.sang@pengutronix.de>
Sat, 10 Sep 2011 10:29:43 +0000 (12:29 +0200)
committerShawn Guo <shawn.guo@linaro.org>
Fri, 27 Jan 2012 03:50:14 +0000 (11:50 +0800)
Like with all other clocks, the divider for the SAIF devices should not
be altered when the clock is gated. Bail out when this is the case like
the other clocks do.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Dong Aisheng-B29396 <B29396@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/mach-mxs/clock-mx28.c

index f71d012..54d82a4 100644 (file)
@@ -477,6 +477,10 @@ static int name##_set_rate(struct clk *clk, unsigned long rate)            \
        reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs);         \
        reg &= ~BM_CLKCTRL_##rs##_DIV;                                  \
        reg |= div << BP_CLKCTRL_##rs##_DIV;                            \
+       if (reg & (1 << clk->enable_shift)) {                           \
+               pr_err("%s: clock is gated\n", __func__);               \
+               return -EINVAL;                                         \
+       }                                                               \
        __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs);         \
                                                                        \
        for (i = 10000; i; i--)                                         \