select CPU_V7
select ARM_AMBA
select GENERIC_CLOCKEVENTS
- select COMMON_CLKDEV
+ select CLKDEV_LOOKUP
select ARCH_REQUIRE_GPIOLIB
+ select ARCH_HAS_CPUFREQ
help
Support for ST-Ericsson's Ux500 architecture
return (cycles_t)timer32_read(t);
}
+ /*
+ * Kernel assumes that sched_clock can be called early but may not have
+ * things ready yet.
+ */
+ static cycle_t read_dummy(struct clocksource *cs)
+ {
+ return 0;
+ }
+
+
static struct clocksource clocksource_davinci = {
.rating = 300,
- .read = read_cycles,
+ .read = read_dummy,
.mask = CLOCKSOURCE_MASK(32),
- .shift = 24,
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
davinci_clock_tick_rate = clk_get_rate(timer_clk);
/* setup clocksource */
+ clocksource_davinci.read = read_cycles;
clocksource_davinci.name = id_to_name[clocksource_id];
- clocksource_davinci.mult =
- clocksource_khz2mult(davinci_clock_tick_rate/1000,
- clocksource_davinci.shift);
- if (clocksource_register(&clocksource_davinci))
+ if (clocksource_register_hz(&clocksource_davinci,
+ davinci_clock_tick_rate))
printk(err, clocksource_davinci.name);
/* setup clockevent */
*/
#include <linux/module.h>
#include <linux/kernel.h>
- #include <linux/list.h>
- #include <linux/errno.h>
- #include <linux/err.h>
- #include <linux/string.h>
#include <linux/clk.h>
#include <linux/spinlock.h>
- #include <linux/platform_device.h>
#include <linux/delay.h>
-
-#include <asm/clkdev.h>
+#include <linux/clkdev.h>
- #include <mach/pxa2xx-regs.h>
- #include <mach/hardware.h>
-
- #include "devices.h"
- #include "generic.h"
#include "clock.h"
static DEFINE_SPINLOCK(clocks_lock);
-#include <asm/clkdev.h>
+#include <linux/clkdev.h>
+ #include <linux/sysdev.h>
struct clkops {
void (*enable)(struct clk *);
iotable_init(ux500_io_desc, ARRAY_SIZE(ux500_io_desc));
}
- void __init ux500_init_devices(void)
- {
- amba_add_devices(ux500_amba_devs, ARRAY_SIZE(ux500_amba_devs));
- }
-
void __init ux500_init_irq(void)
{
- gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29);
- gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
+ gic_init(0, 29, __io_address(UX500_GIC_DIST_BASE),
+ __io_address(UX500_GIC_CPU_BASE));
/*
* Init clocks here so that they are available for system timer
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
- volatile int __cpuinitdata pen_release = -1;
+ volatile int pen_release = -1;
-static unsigned int __init get_core_count(void)
+/*
+ * Write pen_release in a way that is guaranteed to be visible to all
+ * observers, irrespective of whether they're taking part in coherency
+ * or not. This is necessary for the hotplug code to work reliably.
+ */
+static void write_pen_release(int val)
{
- return scu_get_core_count(__io_address(UX500_SCU_BASE));
+ pen_release = val;
+ smp_wmb();
+ __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
+ outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
}
static DEFINE_SPINLOCK(boot_lock);