drm/nv50/disp: use correct register to determine DP display bpp
authorIlia Mirkin <imirkin@alum.mit.edu>
Fri, 14 Feb 2014 02:57:15 +0000 (21:57 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 7 Mar 2014 05:30:00 +0000 (21:30 -0800)
commitb85dac35a83f41e88f587b6d9d9b514581d9b034
tree1df2184148f4dbac4f29106cbcc4bfc50949c8b6
parent6fa1b5b1364195cc5a42f7e629a1d1863cfff69f
drm/nv50/disp: use correct register to determine DP display bpp

commit a7f1c1e65b68e1e1ab70898528d5977ed68a0a7d upstream.

Commit 0a0afd282f ("drm/nv50-/disp: move DP link training to core and
train from supervisor") added code that uses the wrong register for
computing the display bpp, used for bandwidth calculation. Adjust to use
the same register as used by exec_clkcmp and nv50_disp_intr_unk20_2_dp.

Reported-by: Torsten Wagner <torsten.wagner@gmail.com>
Reported-by: Michael Gulick <mgulick@mathworks.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67628
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/nouveau/core/engine/disp/nv50.c